1. Field of the Invention
This invention is related generally to data processing systems and, more particularly, to data processing systems that require execution of a multiplicity of instructions to execute a single macroinstruction.
2. Description of the Related Art
In complex data processing systems, a frequently used implementation tool is the use of microcoded central processing units. In this implementation technique, a data processing system instruction initiates activity in a specialized processing unit, typically referred to as a microsequencer. In response to a machine instruction, the microsequencer retrieves a sequence of special microinstructions, the microinstructions having a format that is completely unrelated to the format for data processing system instructions. These microinstructions are typically stored in a special memory called "control store". Microinstructions are also much wider than data processing instructions in complex, high performance data processing systems.
Microcoded techniques provide a means for implementing complex machine instructions that perform a multiplicity of operations as indivisible atomic units without program interruption. On the other hand, microcoded techniques have the disadvantage of requiring special fast control store and hardware logic to sequence the microinstructions. In other data processing systems, typically called "Reduced Instruction Set Computers" (RISC), microcoded techniques are not used. Instead, the data processing system is restricted to system instructions that can be implemented directly in hardware without requiring microcoded techniques. Such a restriction places additional burdens on the software programs that must cope with a data processing system which lacks the primitive operations needed.
A need has therefore been felt for a technique that allows a data processing system that does not include microcode, to provide data processing system functions that can be complex operations. Such complex operations are to be provided as atomic operations that ensure the absence of exception conditions in the hardware and noninterruptible operation.